1. Field of the Invention
The present invention relates to a semiconductor integrated circuit that comprises a pad structure for providing increased ease of testing, a signal input/output circuit, and an input/output signal control circuit.
2. Background Art
The pads for a conventional semiconductor integrated circuit are formed independently of each other. During wafer testing, a probe needle is brought into contact with the pads for supplying a power supply voltage and a test input signal to and acquiring a test output signal from the semiconductor integrated circuit.
Another proposed semiconductor integrated circuit connects a power supply pad to a bonding pad to enhance the power supply accuracy for wafer testing (Japanese Patent Laid-open No. 260048/1988 (FIG. 3, page 3)).